Digital Design and Computer Architecture, RISC-V Edition

Citation

Harris, S. L., & Harris, D. (2021). Digital Design and Computer Architecture, RISC-V Edition. Morgan Kaufmann (Elsevier).

Chapter Summary

The printed book has eight chapters of about 540 pages in total. A ninth chapter on embedded input/output and appendices on digital system implementation, the RISC-V instruction set and C programming are provided through the book's companion website. According to the publisher, the book "takes the reader from the fundamentals of digital logic to the actual design of a processor", moving from gates through combinational and sequential circuits to a RISC-V microprocessor, with SystemVerilog and VHDL used throughout.

Chapter 1: From Zero to One

The opening chapter (about 50 pages) is the starting point of the sequence. Its title, "From Zero to One", and the publisher's statement that the book begins with digital logic gates indicate that it introduces the basic ideas of digital logic.

Chapter 2: Combinational Logic Design

The chapter (about 50 pages) designs circuits whose outputs depend only on their present inputs, using logic gates as the building blocks.

Chapter 3: Sequential Logic Design

Chapter 3 (about 65 pages) adds circuits with memory, whose outputs depend on past inputs as well. It is the longer of the two logic design chapters.

Chapter 4: Hardware Description Languages

This chapter (about 65 pages) teaches the languages in which the circuits are described. The publisher states that SystemVerilog and VHDL are integrated throughout the book in examples of CAD-based design, and the authors' errata list refers to a seven-segment display decoder example in this chapter.

Chapter 5: Digital Building Blocks

Chapter 5 (about 60 pages) builds on the combinational and sequential circuits of Chapters 2 and 3. The publisher calls these "fundamental building blocks" and says they form the basis for the processor design that follows.

Chapter 6: Architecture

The architecture chapter (about 90 pages) gives a full understanding of the RISC-V instruction set, which the publisher says lets readers program the RISC-V processor in hardware simulation, software simulation and in hardware. The companion I/O chapter points back to Section 6.5.1 of this chapter, where a portion of the address space is set aside for I/O devices.

Chapter 7: Microarchitecture

The longest chapter (about 105 pages) builds the processor. The publisher lists SystemVerilog and VHDL designs of single-cycle, multicycle and pipelined versions of the RISC-V architecture. The errata list shows that its exercises include timing questions, such as assuming the delay of an equality comparator.

Chapter 8: Memory Systems

The printed book ends with a compact chapter (about 45 pages) on memory systems, the shortest of the eight.

Companion material: Chapter 9 and Appendices

Chapter 9, Embedded I/O Systems (about 64 pages), introduces memory-mapped I/O, then shows how to use SparkFun's RED-V RedBoard, which has a RISC-V microcontroller, with its general-purpose, serial and analog I/O, timers and pulse-width modulation, and finally interfaces with character LCDs, VGA monitors, Bluetooth radios and motors. Appendix A (Digital System Implementation) covers 74xx logic, programmable logic, application-specific integrated circuits, datasheets, logic families, switches and LEDs, packaging, transmission lines and economics, and is labelled as not needed for understanding the rest of the book. Appendix B summarizes the RISC-V instruction set in tables (RV32I, RV64I, floating point, multiply and divide, compressed instructions, pseudoinstructions and privileged instructions), and Appendix C is a primer on C programming from basics to common mistakes.

Key Concepts

Chapters 1–5: Digital Design

• Combinational and sequential logic: circuits with and without memory, the two classes from which everything else is built.
• Hardware description languages: describing, simulating and synthesizing circuits in SystemVerilog and VHDL.
• Digital building blocks: standard larger components made from gates and registers.

Chapters 6–8: Architecture and Microarchitecture

• The RISC-V instruction set: the interface between software and the processor.
• Single-cycle, multicycle and pipelined microarchitectures: three implementations of the same architecture, with their trade-offs.
• Memory systems: how a processor is connected to memory.

Companion Chapter 9 and Appendices

• Memory-mapped I/O: reaching devices through ordinary loads and stores.
• Microcontroller peripherals: GPIO, serial and analog I/O, timers and pulse-width modulation on a RISC-V board.

Critical Analysis

Strengths

• One thread from gates to processor. The chapter order moves in a line from logic to a working RISC-V processor, and the publisher describes the aim as letting readers build their own microprocessor with a top-to-bottom understanding of how it works.
• Hardware description languages included. Both SystemVerilog and VHDL are presented, with designs of fundamental building blocks and of all three processor versions, so readers can choose a language.
• A modern, open instruction set. The RISC-V edition uses an open-source architecture, and Appendix B on the companion site gives instruction tables for the base and extension instruction sets.
• Extensive companion resources. The authors' site provides lecture slides, labs, figures, HDL files, solutions to the odd-numbered exercises, videos, a RISC-V visualizer called SonicRV and two free-to-view edX courses (digital design and computer architecture).
• Practical hardware chapter. The online I/O chapter turns the architecture into something that can be run on an actual board.

Limitations

• Some key material is online only. The I/O chapter and three appendices are not in the print book, so readers need the companion site.
• Compact treatment of memory. At about 45 pages, the memory systems chapter is much shorter than the microarchitecture chapter and is not a substitute for a dedicated architecture text.
• One instruction set and one board. Everything is built on RISC-V and the I/O examples use a specific SparkFun board; readers who need MIPS or ARM material should look at the other editions of this book.
• Public solutions cover half the exercises. The authors' site offers solutions to the odd-numbered exercises only, so self-study readers have no published answers for the rest.

Where It Fits in the Course

This book works upward from hardware: the reader designs the processor. Bryant and O'Hallaron's Computer Systems: A Programmer's Perspective starts from the programmer's side and treats the machine through C, machine code, memory and operating-system mechanisms, so it pairs well as the software counterpart. Petzold's Code is a narrative introduction for general readers that can precede this book, and Nisan and Schocken's The Elements of Computing Systems is a project-based path that also begins at logic gates and builds up to a compiler and operating system.

After this book, Hennessy and Patterson's Computer Architecture: A Quantitative Approach is a graduate-level study of how design choices affect performance and energy, and Shen and Lipasti's Modern Processor Design develops superscalar processors beyond the pipelined design reached in Chapter 7.

How to Use This Book

The publisher's stated readership is undergraduate electrical engineering, computer engineering and computer science students taking a combined digital logic and computer architecture course, and professionals who want to understand the RISC-V architecture. The book also suits a two-term sequence in digital logic and then computer organization.

A practical plan:

• Core: read Chapters 1 to 8 in order. Chapters 1 to 3 and 5 are the digital design core, and Chapter 4 is best read alongside them, writing and simulating each circuit as it appears.
• Architecture half: Chapters 6 to 8, with the RISC-V tables of Appendix B open beside Chapter 6.
• Optional: Chapter 9 if a RISC-V board is available; Appendix A for practical engineering issues; Appendix C if C programming is unfamiliar.
• Practice: use the exercises, the odd-numbered solutions and the labs on the authors' site, and the edX courses for video lectures with interactive problems.