Circuit reasoning: loading changes both voltage and power
An unloaded divider voltage is not a promise of the voltage delivered to a load. Replace the source network by its terminal equivalent, then return to the original circuit when checking where the supplied power actually goes.
Course topic: Circuits and Electronics
Study route and exercise: University Reading List editorial project. How we curate · Sources checked:
On this page
Scope and responsibility
Ideal linear DC resistive analysis: loading, Thevenin equivalence, power balance and a global maximum over positive load resistance. Fiore means DC version 1.0.14; Alexander–Sadiku the selected seventh-edition ISE print; Storey the 2017 sixth-edition paperback. Sources and resistors are fixed and ideal. No component availability, ratings, thermal behavior or construction performance is inferred.
Choose your starting point
I need a free first DC course
Use Fiore for units, network equations and circuit theorems before its separate AC continuation.
I want a broad circuit-analysis spine
Use Alexander–Sadiku for a systematic DC-to-AC sequence, without buying platform access by accident.
I want the measurement/system context
Use Storey to connect circuit loading with measuring instruments, sensors and functional blocks.
Compare the three books
DC Electrical Circuit Analysis: A Practical Approach
James M. Fiore · Edition: 1.0.14 · 2025
Free first DC analysis
- Choose it when
- School algebra, simultaneous equations and unit conversion are your starting tools.
- Use another route when
- You immediately need phasor or frequency-domain analysis; Fiore’s AC text is a separate continuation.
- Selected reading
- Series-parallel circuits, network theorems and nodal/mesh analysis in the selected DC version.
- Limits and trade-offs
- The full free text has noncommercial/sharealike terms and selected odd-numbered answers, not a complete universal answer key.
Try before choosing
Solve the loaded divider below directly, then account for all resistor powers.
Check your work: The node is 6 V and supplied 72 mW equals 36+18+18 mW.
Fundamentals of Electric Circuits
Charles K. Alexander; Matthew N. O. Sadiku · Edition: 7 (International Student Edition, Print) · 2021
Comprehensive circuit spine
- Choose it when
- You want DC foundations followed by dynamics, phasors and advanced analysis.
- Use another route when
- You need only an electronics overview or assume a print ISBN includes Connect assignments.
- Selected reading
- Chapters 1–4 for concepts, laws, analysis and theorems; later 7 for first-order circuits and 9 for phasors.
- Limits and trade-offs
- The selected ©2021 ISE print, ebook and Connect are distinct products; the early DC route needs less mathematics than later sections.
Try before choosing
Deactivate the ideal voltage source and find the output resistance of the original divider.
Check your work: The source becomes a short, so 1 kΩ and 2 kΩ are parallel: Rth=2/3 kΩ, not 3 kΩ.
Electronics: A Systems Approach
Neil Storey · Edition: 6 · 2017
Systems and measurement route
- Choose it when
- You want to see why an instrument or next block can change a circuit’s output.
- Use another route when
- You need only a dense circuit-theorem reference without device/system context.
- Selected reading
- Measurement of Voltages and Currents, Resistance and DC Circuits, then Electronic Systems and Sensors.
- Limits and trade-offs
- Broader electronics context trades some focus for functional understanding; companion resources are not a complete free book.
Try before choosing
Treat a 2 kΩ input resistance as a voltmeter across the 2 kΩ lower divider resistor.
Check your work: The input is a load, not an ideal observer: it changes an 8 V open-circuit output to 6 V.
Check your preparation
Can I draw the actual topology?
A 12 V ideal source feeds Rs=1 kΩ, then a node. R2=2 kΩ and RL both connect from that node to ground; they are parallel.
Can I keep units and power signs consistent?
V/kΩ gives mA. Voltage times mA gives mW. State source power as delivered and resistor powers as absorbed.
What does a terminal equivalent preserve?
For this linear network it preserves voltage/current behavior at the load port. It does not preserve the original internal branch currents or dissipation pattern.
A six-step study plan
Steps completed: 0 / 6
These are your own study marks, not an assessment. They are not sent to this site.
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Draw and predict
Selected reading: Fiore quantities and series-parallel material.
What to do: Draw the unloaded and loaded circuit and predict whether output voltage rises or falls.
Check your work: A finite passive shunt load reduces this divider’s output.
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Find the terminal equivalent
Selected reading: Network-theorem material.
What to do: Compute open-circuit voltage and resistance seen with the ideal source deactivated.
Check your work: Vth=8 V; Rth=2/3 kΩ.
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Solve by two methods
Selected reading: Thevenin and nodal analysis.
What to do: Compute the loaded voltage using the equivalent and an original-node equation.
Check your work: Both give 6 V for RL=2 kΩ.
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Close the original power balance
Selected reading: DC power and Kirchhoff laws.
What to do: Find each branch current and all original-circuit resistor powers.
Check your work: Supplied 72 mW equals total absorbed power.
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Prove a global load optimum
Selected reading: Network theorems and the follow-up.
What to do: Maximize load power for all RL>0 using a square inequality.
Check your work: Equality requires RL=Rth; endpoint intuition or a plot alone is not the proof.
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Audit the efficiency claim
Selected reading: Original circuit and terminal equivalent.
What to do: Calculate actual source power at the load-power optimum and compare with the equivalent’s internal balance.
Check your work: The original source efficiency is 25%; a terminal equivalent does not preserve its internal power bookkeeping.
Worked exercise
A divider with a finite load
An ideal 12 V source feeds Rs=1 kΩ in series with an output node. R2=2 kΩ connects the node to ground. Add RL=2 kΩ from the same node to ground. Find the Thevenin equivalent, loaded voltage, branch currents and the original circuit’s power balance.
Assumptions
Fixed ideal source and positive ideal linear resistors; steady DC. Ground is the source’s negative terminal. The load is in parallel with R2. Powers below are source delivery or resistor absorption, as labeled.
- Without the load, Vth=12·2/(1+2)=8 V. Short the deactivated ideal voltage source: Rth=1||2=2/3 kΩ.
- With RL=2 kΩ, Vout=8·2/(2+2/3)=6 V. Directly, R2||RL=1 kΩ and the 1 kΩ/1 kΩ divider also gives 6 V.
- Source/Rs current is (12−6)/1 kΩ=6 mA; R2 and RL each carry 6/2 kΩ=3 mA. The node balance is 6=3+3 mA.
- Delivered source power is 12·6=72 mW. Rs absorbs 6²·1=36 mW; R2 and RL each absorb 6·3=18 mW. Total 36+18+18=72 mW.
Answer and interpretation
Vth=8 V, Rth=2/3 kΩ, loaded output 6 V; source current 6 mA and each lower branch 3 mA. Load power is 18 mW; the original power balance closes at 72 mW.
Test the result
Using the unloaded 8 V at the loaded node violates the original-node equation. The ideal source is shorted only while finding Rth, not in the operating circuit.
Change an assumption
Maximum load power is not a 50% claim about the original source
Keep the original 12 V source, 1 kΩ series resistor and 2 kΩ lower resistor fixed, but allow RL to vary over all positive real resistances. Prove the global maximum load power, then compute the actual original-source efficiency PL/Psource at that load.
- Terminal equivalence gives PL=Vth² RL/(Rth+RL)². Since (RL−Rth)²≥0, (RL+Rth)²≥4RL Rth, so PL≤Vth²/(4Rth), with equality only at RL=Rth.
- Thus RL=2/3 kΩ and PL=64/[4(2/3)] mW=24 mW. Output voltage is 4 V and load current is 6 mA.
- Return to the original network: source current=(12−4)/1 kΩ=8 mA, R2 current=2 mA, and source delivery=96 mW. Rs absorbs 64 mW, R2 absorbs 8 mW and the load absorbs 24 mW.
- Actual source efficiency at this load-power optimum is 24/96=25%. The equivalent 8 V source would deliver 48 mW, split equally between its Rth and load; that 50% balance belongs to the equivalent, not the original internal network.
Answer and interpretation
The unique global load-power optimum over RL>0 is RL=2/3 kΩ, giving 24 mW. The actual original-source efficiency there is 25%.
Test the result
Original powers satisfy 64+8+24=96 mW. As RL→0 or RL→infinity, load power tends to zero. The theorem maximizes load power, not efficiency, and does not require an actual stock resistor to equal the mathematical optimum.
Common mistakes
Ignoring the next stage
An input resistance is part of the circuit. Use its loaded topology.
Adding resistors after deactivation
After shorting the ideal voltage source, inspect connections; the two divider resistors are parallel at the output.
Using equivalent internal power as physical power
Return to the original branches when calculating actual supply current or losses.
Before moving on
- Solve a loaded divider directly and by terminal equivalence.
- Prove the global load-power maximum for positive resistance.
- Distinguish original-source power from equivalent-source bookkeeping.
Sources and edition checks
Sources checked:
- Author: DC Electrical Circuit Analysis
The author PDF verifies DC version, full free scope, basic preparation, network-theorem route and selected-answer coverage.
- McGraw Hill: selected seventh-edition ISE print
McGraw Hill distinguishes the selected ©2021 ISE print from ebook/Connect products and lists the early DC chapters.
- Pearson: selected sixth-edition paperback
Pearson identifies the 2017 sixth-edition print and measurement, resistance, systems and sensor contents.
These are proposed study activities, not official course assignments or a claim that every book has been read cover to cover.